Sr SDET - Firmware Automation
Core
Architect and build production-quality firmware test automation frameworks, hardware-in-the-loop (HIL) infrastructure, and CI/CD pipelines for embedded systems and photonic transceivers.
Role type
Senior IC SDET (Firmware Automation & HIL)
Builds
Production ML models | product features | infrastructure
Domain
Embedded systems, firmware, photonic transceivers, hardware-in-the-loop testing
Deliverable
infrastructure
Required skills
Python, embedded C/C++, CI/CD pipeline orchestration, hardware driver integration, GDB/JTAG debugging, test architecture design, hardware fixture management, telemetry pipeline design, cross-team test strategy definition
Preferred skills
Optical transceiver testing, CMIS/OpenBMC/Redfish familiarity, Pytest/Zephyr/FreeRTOS tooling, Twister/Renode/QEMU, AI-assisted test analytics, precision analog/mixed-signal hardware testing
Technologies
Python, C/C++, GDB, JTAG, Pytest, Zephyr, FreeRTOS, Twister, Renode, QEMU, OpenBMC, Redfish, CMIS
Responsibilities
Own architecture and roadmap of firmware test automation frameworks; Design and build production-quality automation for firmware features and hardware; Build and operate hardware-in-the-loop infrastructure including fixtures and device farms; Integrate firmware testing into CI/CD for automatic build, flash, and execution; Debug failures across firmware, boards, instruments, and test code; Mentor engineers and document test architecture
Seniority
Senior, hands-on IC
