Hardware Security Technical Leader - Hyperscaler Hybrid
Core
Lead hardware security initiatives for Cisco's next-generation Hyperscaler platforms, ensuring security, trust, and resilience from high-level architecture down to component-level silicon.
Role type
Senior Hardware Security Technical Leader
Builds
Secure hardware solutions for Hyperscaler architectures
Domain
Hardware Security / Hyperscaler Infrastructure
Required skills
Hardware design, low-level architecture, hardware root-of-trust (RoT), secure boot, hardware/firmware resiliency, tamper resistance, cryptographic imprinting, hardware cryptographic acceleration, threat modeling, compliance frameworks (NIST, NSA CNSA, EU CRA)
Preferred skills
Hardware-rooted attestation architectures, device identity mechanisms (SPDM, TCG DICE), Hyperscaler/cloud platform architectures, security IP implementation, hardware security analysis (fault injection, side-channel analysis)
Technologies
FPGA, OpenBMC, Caliptra, OpenTitan, OpenPRoT, AES-GCM, SHA-2/3, LMS/XMSS, ML-DSA/ML-KEM, NIST SP 800-193, NSA CNSA 2.0, TCG DICE, TPM
Responsibilities
Provide security requirements and architectural design guidance to product teams and vendors; coordinate in external standards groups (OCP, SONiC); evaluate system-level hardware designs for vulnerabilities; establish requirements aligned with industry standards; author security specifications and threat models; lead concurrent security evaluations and design reviews.
Seniority
Senior, hands-on IC with leadership responsibilities
