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Optical Hardware Systems Test Engineer

San Jose, California, US💼 Full-time💰 $167,700–$167,700🗓 2026-09-22 → 2026-09-25

Core

Validate and ensure the quality of next-generation networking platforms (switches, routers, data center systems) by leading hands-on lab testing, validation, and bring-up of ultra-high-speed silicon and advanced optics.

Role type

Senior IC optical hardware systems test engineer

Builds

Next-generation networking systems integrating 112G/224G PAM4 SerDes, high-density Data Center Interconnects (DCI), and Co-Packaged Optics (CPO) architectures.

Domain

Networking hardware, high-speed electro-optics, silicon photonics

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Lab bring-up and system-level validation, high-speed optical transceiver characterization, SerDes (56G/112G+ PAM4) testing, bit error rate (BER) analysis, Python/C++ test automation, hardware debugging, signal integrity analysis, thermal characterization

Preferred skills

Co-Packaged Optics (CPO) / Near-Packaged Optics (NPO) knowledge, Ethernet standards (IEEE 802.3 400G/800G), PCIe management interfaces, liquid cooling thermal management, Cisco Silicon One architecture experience, JMP/Tableau analytics

Technologies

Oscilloscopes, BERTs, optical spectrum analyzers, power meters, VNAs, TDR, sampling scopes, Python, C/C++, JMP, Tableau

Responsibilities

Lead hands-on bring-up, validation, and characterization of Silicon One ASICs with high-speed optical transceivers; Measure and characterize high-speed electro-optic channels; Develop and maintain test automation scripts for lab equipment; Perform system stress testing across temperature, voltage, and traffic corners; Debug and root-cause hardware, signal integrity, and optical link issues; Partner with ASIC architecture, signal integrity, board design, software, and manufacturing teams

Seniority

Senior, hands-on IC

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