Software Engineering Technical Leader – Silicon One Software (Timing & Synchronization)
Core
Lead the design, development, and delivery of Timing and Synchronization software components for Cisco Silicon One platforms, focusing on clock synchronization, timing measurements, and diagnostics.
Role type
Senior IC software engineering technical leader (embedded networking)
Builds
Timing and Synchronization software features for Cisco Silicon One platforms
Domain
Networking hardware, embedded Linux systems, timing protocols
Deliverable
production ML models | product features | infrastructure
Required skills
C++ development, embedded Linux system-level software, GDB debugging, Precision Time Protocol (PTP), Synchronous Ethernet (SyncE), Layer 1/2 networking technologies, PHY/MAC/SerDes hardware knowledge
Preferred skills
Multi-NOS timing software experience, IEEE 1588 standards, timing validation and clock recovery, ASIC/NPU SDK and driver development, Python for automation, Port Management and Ethernet port bring-up
Technologies
C++, Linux, GDB, Python, IEEE 1588, PTP, SyncE
Responsibilities
Lead design and delivery of timing software features; implement PTP, SyncE, and clock synchronization; develop high-performance C++ solutions for embedded Linux; drive root-cause analysis and debugging; mentor engineers and conduct code reviews; collaborate across software, firmware, and hardware teams
Seniority
Senior, hands-on IC with technical leadership