Packaging Engineer
Core
Adapting industry standard packaging processes and materials for quantum devices, focusing on thermal, structural, and thermo-mechanical simulations for hardware including substrates, interposers, chip attach, and cryogenic components.
Role type
Packaging Engineer (Quantum Hardware)
Builds
Quantum device packaging hardware and supporting cryogenic structures
Domain
Quantum computing / Cryogenic engineering / Advanced packaging
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
FEA tools (ANSYS, COMSOL, Abacus), Cryogenic hardware experience, Advanced packaging technologies (flip chip, substrates, interposers), Heat transfer fundamentals, Solid mechanics, Numerical methods, Simulation-to-test correlation, Model setup and meshing strategies, Convergence assessment, Reusable simulation template development
Preferred skills
AI tools for performance modeling and task automation
Technologies
ANSYS, COMSOL, Abacus
Responsibilities
Perform thermal, structural, and thermo-mechanical simulations for quantum packaging hardware; Assess CTE mismatch, interfacial stress, warpage, and deformation across thermal cycles; Conduct packaging reliability assessments for flip-chip attach, solder joints, and PCB interfaces; Generate and maintain reusable simulation templates, material libraries, and modeling workflows; Correlate simulation results with cryogenic test data and iterate models based on measurement feedback.
Seniority
Mid-level to Senior (2+ to 5+ years experience required)
