Principal Silicon Performance Architect

## About the role - Extend and adapt simulation infrastructure to model new micro-architecture innovations for AI inference. - Analyze performance for current and forward-looking AI inference workloads across latency, throughput, and efficiency dimensions. - Drive design-space exploration using AI-assisted workflows, automation, and large-scale experiment generation. - Communicate performance insights clearly and influence architecture decisions through data-driven recommendations. - Collaborate closely with chip, system, and software architects to propose, evaluate, and iterate on architectural variations. ## Requirements - Bachelor's Degree in Computer Science or related technical field AND 8+ years technical engineering experience with coding in languages including, but not limited to C/C++, Python OR equivalent experience. - Advanced Degree (Master's, Ph.D.) in Electrical Engineering, Computer Engineering, or related field. - Experience in chip architecture or micro-architecture analysis at the logical level, including memory, functional units, memory controllers, and Input/Output (I/O) controllers. - Experience in performance engineering, including profiling, bottleneck analysis, experimental design, and micro-architecture trade-off analysis. - Experience using performance modeling or simulation to evaluate hardware/software trade-offs across chip, system, and software teams. - Experience with AI inference acceleration features and accelerator or Graphics Processing Unit (GPU) performance analysis. - Experience with the AI inference software stack, including compilers, runtimes, and model serving systems. - Experience modifying architectural simulators or performance modeling codebases (e.g., C, C++, or Python).