Senior Yield Enhancement Engineer #9573
Core
Transfer advanced semiconductor technology from Taiwan to overseas fabs, ensuring successful ramp-up and product yield improvement.
Role type
Senior IC yield enhancement engineer (semiconductor manufacturing)
Builds
Advanced semiconductor chips (N4, N3, N2, 2nm processes)
Domain
Semiconductor manufacturing / Process engineering
Required skills
Defect inspection metrology (Bright Field, Dark Field, EBI), Defect review metrology (SEM, CD-SEM, TEM), Statistical process control, Cleanroom operations (ISO 4/Class 10), Semiconductor physics, CMOS device operation, Process knowledge (LIT, ETC, WET, CVD, PVD, DIF, CMP), Data analysis for defect sources
Preferred skills
Experience with N4 or more advanced process technology, Cross-departmental collaboration
Technologies
Bright Field inspection, Dark Field inspection, Electron Beam Inspection (EBI), Scanning Electron Microscopy (SEM), Critical Dimension SEM (CD-SEM), Transmission Electron Microscopy (TEM)
Responsibilities
Define defect reduction roadmap and identify yield-limiting sources, Optimize metrology tool recipes for inline defect detection, Monitor and detect tool shifts in high-volume manufacturing, Resolve issues and escalate properly, Provide production line guidance to prevent defect excursions, Coordinate yield improvement projects and new process qualification
Seniority
Senior, hands-on IC