Sr. Process Engineer - Diffusion (Multiple Positions) #8995
Core
Lead design and execution of experiments to optimize leading-edge semiconductor manufacturing processes (N4, N3, N2, 2nm) and achieve precision control at atomic levels.
Role type
Senior IC process engineer (diffusion, ion implantation, anneal)
Builds
Leading-edge integrated modules for TSMC's customers
Domain
Semiconductor manufacturing (5nm and below tech nodes)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Statistics process control, Design of Experiment (DOE), statistical methods for modeling multivariate data sets, semiconductor ion implantation process (5nm or below), RTA anneal process (5nm or below), wafer cross section techniques, semiconductor thin film deposition, plasma etching, plasma simulation, dynamic random-access memory (DRAM), 3D NAND Flash, Atomic Layer Deposition (ALD), Chemical Vapor Deposition (CVD), Plasma Enhanced Chemical Vapor Deposition (PECVD)
Preferred skills
Experience with metrology tools (TEM, SEM, CD-SEM, EDS, FIB, AFM, XRD, Emission Spectroscopy, Raman Spectroscopy, Spectroscopic Ellipsometry, Quartz PCI, FT-IR)
Technologies
N4, N3, N2, 2nm process technology, 5nm tech node
Responsibilities
Apply statistics process control methods to establish and sustain a robust manufacturing process; Supervise the installation and maintenance of manufacturing equipment to expand capacity with precision and quality; Collaborate with equipment and material suppliers to identify technology gaps and devise continuous improvement solutions.
Seniority
Senior, hands-on IC
