AI Compiler Engineer
Core
Building a complete MLIR-based compiler stack from scratch to run massive AI models on bare-metal 5G/6G telecommunications silicon without an OS.
Role type
Senior AI Compiler Engineer (Greenfield)
Builds
Custom MLIR dialects, transformation passes, and a production C++/LLVM compiler codebase for 5G/6G silicon.
Domain
Telecommunications infrastructure / Bare-metal AI / Compiler Infrastructure
Deliverable
production ML models
Required skills
MLIR mastery (custom passes, dialect conversions, TableGen), Deep C++ and LLVM expertise, JAX/PyTorch/TensorFlow model lowering, StableHLO/XLA op-semantics knowledge, Embedded DSP/VLIW architecture experience, Advanced optimization (loop tiling, vectorization, quantization), Hardware-level awareness (DMA engines, memory hierarchies)
Preferred skills
Experience with fixed-point arithmetic, complex number handling in MLIR, instruction scheduling, register pressure management
Technologies
MLIR, LLVM, C++, JAX, StableHLO, XLA, TableGen
Responsibilities
Design and implement custom MLIR dialects and conversion infrastructure, Lower high-level computational graphs to hardware-specific IR, Build static scheduling and tiling passes for memory orchestration, Maintain high-performance modular LLVM-based compiler codebase
Seniority
Senior, hands-on IC
